RISC-V is an alternative microprocessor technology to x86 and ARM, with its instruction set architecture (ISA) being open rather than closed. This video explains what RISC-V is all about, including its origins, key market players, hardware, applications, intellectual property (IP), and the likely role of global politics and international trade barriers in determining RISC-V’s success.
Note that I have posted a “RISC-V 2023 Update“ video here:
My previous review of the VisionFive RISC-V SBC that can run a Linux OS is here:
And my review of the Nezha RISC-V SBC that can also run a Linux OS is here:
REFERENCES
Specific sources included in the video are as follows:
RISC-V International:
The first RISC-V Instruction Set Manual (from 2011):
SiFive website: and RISC-V core IP:
SiFive development boards:
Samsung to use SiFive RISC-V cores:
T-Head Xuantie product overview:
Alibaba (T-Head) open sources Xuantie RISC-V cores:
Western Digital RISC-V: -- the technology brief pdf is particularly interesting:
Chinese Academy of Sciences release Xiangshan RISC-V processor:
Russia to Build 8-Core RISC-V CPUs for Laptops, Government Systems:
India selects RISC-V for semiconductor self-sufficiency contest:
More videos on computing and related topics can be found at
You may also like my ExplainingTheFuture channel at:
If you are looking to purchase some of the hardware items that I use in my videos, I have created an Amazon Storefront here: Please note that as an Amazon Associate I earn a commission from any qualifying purchases you may make.
Chapters:
00:00 Introduction
01:26 Open & Closed ISAs
03:55 RISC-V Origins
05:15 Market Players
08:43 Entering the Mainstream
10:34 The Third Platform
#RISC-V #x86 #ARM #ExplainingComputers
1 view
222
46
11 months ago 00:17:51 1
RISC-V 2023 Update: From Embedded Computing to Data Center & Desktop
11 months ago 00:14:24 1
Explaining RISC-V: An x86 & ARM Alternative
11 months ago 00:15:12 1
From blink to DIY Mini Game - Charlieplexing explained
11 months ago 00:16:04 1
VisionFive RISC-V Linux SBC
11 months ago 00:13:58 1
Nezha RISC-V Linux SBC
11 months ago 00:18:57 9
VisionFive 2: RISC-V Quad Core Low Cost SBC
11 months ago 00:20:38 1
Arm vs x86 - Key Differences Explained
1 year ago 00:15:47 1
RISC-V Video Editing & 500th Episode
2 years ago 00:13:32 1
(1063) Dr. Ian Cutress Explains The Hype Around RISC-V - YouTube
2 years ago 00:09:15 6
The Coming RISC-V Revolution
3 years ago 00:23:53 1
The Future of RISC-V Heterogeneous Embedded Virtualization Architectu... Sandro Pinto & José Martins
3 years ago 00:23:24 1
Accelerating AI and non-AI Workloads with 1000+ Energy-Efficient RISC-V Cores on a Sing... Art Swift
3 years ago 00:23:29 1
Sail Specification for RISC-V P-Extension - Bow-Yaw Wang & Jenq-Kuen Lee
3 years ago 00:24:28 1
Exploring the Zce Code-size Reduction ISA Extension - Tariq Kurd, Huawei UK
3 years ago 00:27:50 1
Esperanto’s Custom RISC-V ISA Extensions for Energy-Efficient Machine Learning Applic... Jayesh Iyer
3 years ago 00:04:58 1
RISC-V RV32I S-Type | Maven Silicon
3 years ago 00:19:39 1
OVI: The Open Vector Interface - Roger Espasa & Alberto Moreno, SemiDynamics
3 years ago 00:25:07 1
Embedded Insiders Open Up on RISC-V Summit, MIPI Debug & Trace Specs
3 years ago 00:41:46 1
Linux on RISC-V with Open Source Hardware (OSSummit Japan 2020)
4 years ago 00:13:20 1
Intel is shopping for RISC-V tech - $2 billion offer made for SiFive